Tackling verification challenges for PCIe Gen5

With the PCIe Gen5 interface standard for connecting high-speed components, engineers gain a 32 GT/s data rate per lane, doubling speed over the prior generation, and new features such as support for alternate protocols. But there are also challenges. This white paper details them as well as new features – and provides a case study on how Anritsu used a Siemens Verification IP solution to offer Gen 5 support for a 5G/IoT signal quality analyzer.

What you’ll gain from reading this paper:

  • Benefits of PCIe 5.0 once challenges are met
  • Gen 5 tips for verification engineers
  • Need-to-know details for verification engineering
  • How a test and measurement equipment maker upgraded



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Anritsu

T: (408) 778-2000
F: (408) 776-1744

Address
490 Jarvis Drive
Morgan Hill, CA
95037-2809
United States
View map

 
 

Anritsu

T: (408) 778-2000
F: (408) 776-1744

Address
490 Jarvis Drive
Morgan Hill, CA
95037-2809
United States
View map

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